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Data Transfer Methods
Table 5-1. DMA-Accessible Registers
DMA
Block
Register
Read
Write
ESSI
SCI
EFCOP
HI08
TX0
TX1
TX2
RX
SRX
STX
FDIR
FDOR
HTX
HRX
No
No
No
Yes
Yes
No
No
Yes
No
Yes
Yes
Yes
Yes
No
No
Yes
Yes
No
Yes
No
Timer
the HI08.
Example 5-3. DMA Transfers
bclr#M_D1L0,x:M_IPRC
; disable DMA1 interrupts
bclr#M_D1L1,x:M_IPRC
movep#TBUFF_START,x:M_DSR1 ; DMA1 source is transmit buffer
movep#M_HTX,x:M_DDR1
; DMA1 destination is HTX
movep#TBUFF_SIZE-1,x:M_DCO1; DMA1 count is the full buffer
movep#INIT_DCR1,x:M_DCR1
; init. DMA1 control register
DMA requires more initialization code and consideration of DMA modes. However, it is the
most efficient use of core resources. Once these registers are programmed, you must enable the
DMA by triggering a DMA request off one of the peripheral control flags or enabling it in normal
program flow or an interrupt service routine.
5.4.4 Advantages and Disadvantages
Polling is the easiest method to implement, but it requires a large amount of DSP56311 core
processing power. The core cannot be involved in other processing activities while it is polling
receive and transmit ready bits. Interrupts require more code, but the core can process other
routines while waiting for data I/O. An interrupt is generated when data is ready to be transferred
to or from the peripheral device. DMA requires even less core intervention, and the setup code is
minimal, but the DMA channels must be available.
Note:
Do not use interrupt requests and DMA requests simultaneously.
DSP56311 User’s Manual, Rev. 2
Freescale Semiconductor
5-5
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